5G, 5G Advanced and 6G Infrastructure

Cellular Networks: 5G, and 6G RAN solutions and Intelligent Edge

Developments in 5G, 5G Advanced and 6G technologies are influenced by the need for multiple industries to adopt cellular technologies to service new use cases. Applications such as vehicle-to-everything (V2X) for automotive, plus the need to support untethered robotics with ultra-reliable, low-latency capabilities and connectivity for remote geographies are driving radio and networking capabilities to new levels.

Innovations across the range of the Achronix products, including the Speedster7t family Speedcore eFPGA IP, enable developers to quickly respond to the rapidly changing cellular landscape by selecting an acceleration engine to address a variety of connectivity and algorithmic processing challenges:

  • 5G Advanced and 6G development timelines – We are entering the realm of 5G Advanced with work on 3GPP releases 18-20 already underway. It is through these releases that many of the baseline capabilities required for 6G will start to be identified, leading to the development of an architecture required to meet the initial 6G requirements and eventually to support equipment development and technology evaluations.
  • 5G Advanced and 6G radio technologies – 5G Advanced and 6G will utilize much higher channel bandwidths and require the deployment of significantly higher transmission frequencies. Sub-terahertz frequencies, more dense MIMO antenna arrays with associated beamforming will ensure that the processing requirements in RAN equipment grow exponentially. With 6G transmitters/receivers, the processing requirements for the over-the-air interface will necessitate a tenfold increase in performance for L1 processing and beamforming.
  • 5G and 6G disaggregation of the RAN – Applying cellular technology to support IoT connectivity in addition to connecting people, will broaden equipment and technology requirements significantly. This trend will cause a disaggregation of network hierarchies and radio technologies in order to support a mix of enhanced mobile broadband, ultra-reliable, low latency and massive machine connectivity.
  • Workload transition from cloud to edge – Disaggregation of workloads that today are centered in the cloud will be required to meet many of the use cases and network deployment cost targets. In order to minimize latency, increase security and reduce costs of deploying these new services, a new class of services at the edge of the infrastructure network will emerge. The result is that cloud providers will be working with RAN infrastructure companies to support edge compute capability on visualized compute resources.
  • 5G and 6G supply model – Geopolitical tensions and the importance of cellular technology to national interests will be amplified. A broadening of the supply base for cellular equipment will be a key focus for not only mobile network operators, but also for governments. Today, a handful of equipment suppliers have a very high market share of global deployments. There is already a push to generate a wider supply base through a series of initiatives.

Achronix FPGA and eFPGA IP Solutions

Achronix FPGA technology and solutions will enable the advancement of cellular technology including:

  • Support 6G test lab R&D environments and virtualized DU applications – Speedster7t FPGAs combined with VectorPath accelerator cards is an ideal platform to support algorithmic acceleration of signal processing and machine learning compute-intensive tasks. A mix of FPGA fabric, vector and matrix machines, an innovative low-latency interconnect, 400G Ethernet and PCIe Gen 5.0 ×16 interfaces allows for integration SmartNIC and signal processing capability. Developers can then work to transition this research into physical designs based on standalone FPGAs, eFPGA IP or eFPGA-enabled chiplet architectures. Ultimately, Achronix technology is an ideal solution for performance-optimized, look-aside processing in virtualized distributed units (DU) deployments.
  • 5G advanced macro and small cells – Speedcore eFPGA IP can form the basis of acceleration for a wide range of infrastructure equipment types. Furthermore, future baseband and radio requirements can benefit from the flexibility and scalability of eFPGA IP closely coupled with other SoC-based technology. Whether the eFPGA technology is used in a discrete ASIC or as an eFPGA chiplet combined with other chiplets in a MCM design, the applications for eFPGA in, for example, flexible 5G or 6G equalizer functions or for machine learning inferencing in the radio plane are numerous.
  • 5G algorithmic acceleration – The Speedster7t architecture merges an FPGA fabric with a mix of hard high-speed interconnect and matrix/vector manipulation capabilities. This mix is ideal for low-latency, high-throughput programmable signal processing such as a 5G channel equalizer with closely coupled machine learning inferencing applications.
  • Virtualized distributed units (DU) and central units (CU) platform acceleration – The Speedster7t FPGA powered VectorPath accelerator card provides the basis of a highly flexible platform to run with CPU-based servers running virtualized workloads. Together with Achronix Network Infrastructure Code (ANIC) with kernel mode drivers allow workloads to be offloaded onto the FPGA and signal processing acceleration framework.
  • Multiple 5G advanced and 6G reference examples – Achronix and our wireless partner network can support an array of signal processing kernels, ADC/DAC interfacing, machine learning inferencing models, security and communications interface examples that utilize the ANIC, FPGA and matrix/vector manipulation engines.
  • 5G and 6G flexible physical implementations – Achronix works with customers to support a wide variety of go-to-market options, including working with various silicon ASSP partners to integrate Achronix eFPGA IP technology into any custom silicon implementation.

To learn more about Achronix solutions for 5G, 5G advanced and 6G cellular networks, contact us today.

Application Requirement Speedster7t Value
High performance packet processing for fronthaul, backhaul, and transport
  • Up to 20 Tbps of NoC bandwidth for high-speed, wide-data transfers
  • Optimized 8-bit bus routing
  • Fully flexible bit-wise routing
  • Fine-grained reprogrammability for programmable packet processing pipeline; parallel packet processing engines to support intensive functions such as DPI
  • Flexible (re-)programmable workload acceleration
Power-efficient signal processing for emerging algorithmic requirements, e.g., machine learning applied to network optimization, beamforming and digital predistortion
  • Efficient computation for matrix mathematics and complex arithmetic
  • Memory hierarchy well suited for matrix-matrix and matrix-vector multiplication
Need for flexibility to adapt to new interface requirements
  • Fine-grained programmability for adaption to fronthaul interfaces such as CPRI, OBSAI, Radio over Ethernet (RoE), eCPRI, XRAN/ORAN
Cost reduction path and smaller form-factor
  • Cost and power reduction path with Speedcore embedded FPGA (eFPGA) integrated within an ASIC SoC. Ability to keep required flexibility in cost reduced options.
  • Reduce form-factor and interface power with a chiplet (standard or custom) package integrated within an ASIC SoC.