Unlocking the Full Potential of FPGAs for Real-Time Machine Learning Inference

Tuning an Overlay to an Architecture

An FPGA can be a very attractive platform for many Machine Learning inference requirements.

Machine Learning (ML) inference requires a performant overlay to transform the FPGA from a generic solution into a highly capable AI inference accelerator. In this presentation, using the example of automatic speech recognition (ASR), our Sr. Manager of Product Planning, Salvador Alvarez, explores how an overlay can be used to optimally leverage the potential performance of an FPGA architecture. We review the key components required in the FPGA architecture, such as a 2D Network on Chip (NoC), high speed external memory and optimized Machine Learning Processor (MLP), and how the choice of numerical precision can affect performance and ease of use.

Using standard benchmarks, we demonstrate an ASR appliance that can reduce costs by as much as 90% compared with alternative approaches.


What you’ll learn:

  • Leverage FPGA architecture
  • Demo Automatic Speech Recognition application
  • Choice of numerical precision

 

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About the Speaker(s)

Salvador Alvarez

Salvador Alvarez – Sr. Manager of Product Planning at Achronix

Salvador Alvarez is the Senior Manager of Product Planning at Achronix, coordinating the research, development, and launch of new Achronix products and solutions. With over 20 years of experience in product growth, roadmap development, and competitive intelligence and analysis in the semiconductor, automotive, and edge AI industries, Sal Alvarez is a recognized expert in helping customers realize the advantages of edge AI and deep learning technology over legacy cloud AI approaches.