How to Select the Right eFPGA IP Technology Partner

Authored By:
Bob Siller
Director, Product Marketing

Posted On: Feb 08, 2022

Embedded FPGA (eFPGA) IP is an attractive option for companies looking to create their own ASIC but they need to reduce the inherent risks associated with creating expensive, fixed-function devices. Over the past two years, Achronix has seen a significant increase in customers interested in licensing eFPGA IP to take control of their semiconductor technology roadmap, build their own inventory to reduce the impact of semiconductor shortages, and create a differentiated solution optimized for their specific requirements. However, not all eFPGA IP technology is created equal — even the definition of what an eFPGA is varies depending on the technology partner. When evaluating eFPGA IP technology partners, there are several important factors to consider to ensure you make the right choice.

What are the Benefits of eFPGA IP?

An eFPGA is a licensable FPGA IP core that can be embedded into a custom ASIC or SoC just like any other licensable silicon IP core. The eFPGA IP footprint is determined by the customer, who defines the specific amount of FPGA logic, embedded memory, DSP resources and the number and locations of interface pins for their application. The eFPGA IP functions the same as the fabric of a standalone FPGA that can be reprogrammed with a new bitstream after the product is deployed in the field. eFPGA IP reprogrammability provides several benefits not possible with a fixed-function ASIC:

  • Ability to add new features, such as custom hardware accelerators, programmable interfaces and new logic functions while deployed in the field.
  • Extend product lifecycles by deploying bug fixes and enhancements to address more product requirements.
  • Achieve up to a 90% cost reduction and 75% power reduction when compared to a standalone FPGA.

How to Select the Right eFPGA IP Technology Partner?

In evaluating eFPGA IP technology providers, it's important to look at a these critical factors to help you determine if it's the best solution for your application:

  • Scalability to support small to large eFPGA IP fabric clusters – Can the eFPGA IP technology scale from small to large densities? A small-density eFPGA that makes economic sense would typically be no less than 5K look-up tables on a 12 or 16nm process technology. The majority of eFPGA IP technology partners can provide a small core of this size. However, only Achronix can scale to a size over 1 million look-up tables. For designs that require higher density, only Achronix can deliver solutions which can scale to support the highest-end requirements.
  • Performance – Often eFPGA IP performance can degrade greatly as the design complexity and size increases. Performance bottlenecks can occur in the interconnect, memory access as well as within the eFPGA IP logic itself. Our Speedcore eFPGA IP is silicon proven and in benchmarks using an ARM Cortex-M0 IP processor implementation, Achronix achieves 3× higher performance than competitors' eFPGA IP technology on the same process technology. When assessing eFPGA IP performance, ask the technology partner to provide benchmarks of your RTL performance using their software tools and to ensure it meets your application performance requirements.
  • Silicon area – The amount of silicon area used is one of the most significant considerations of an eFPGA IP implementation. The smaller the area, the lower cost per function — a key metric when comparing eFPGA IP technology. Some eFPGA IP partners provide their technology as an RTL core that can be implemented using standard cells. While using standard cells provides flexibility to port to a different process technologies, this approach is not area efficient. These RTL-based cores can often consume twice the area compared to Achronix Speedcore eFPGA IP. Achronix eFPGA IP technology is delivered as a hard IP that has been optimized for area and performance via a GDSII file.
  • Proven track record in high-volume production – eFPGA IP customers need a solution that has been proven in high-volume production applications. Some eFPGA IP partners boast of many successful tape-outs; however, they do not have any data demonstrating that their technology has been deployed beyond research applications and low-volume commercial products. Speedcore eFPGA IP is the only high-volume proven solution with over 10 million eFPGA IP cores deployed in production applications. Achronix has successfully deployed and supported high-volume applications which gives our customers confidence that their solutions will be a commercial success.
  • Mature software tools – One of the most significant challenges to delivering successful eFPGA IP solutions is the design software tools. Developing FPGA design tools is extremely complex and requires years of refinement to improve the quality of the place and route algorithms, compile times, debugging utilities and overall usability. Achronix has been developing the Achronix Tool Suite since 2006 — 10 years longer than most of our eFPGA IP competitors. Achronix tools are based upon the same platform used by our standalone FPGA customers and include highly refined capabilities to optimize eFPGA IP designs. Part of the Speedcore eFPGA IP deliverables is a customized version of the Achronix Tool Suite specific for each eFPGA IP customer to support their specific implementation, enabling them to leverage industry-standard design flows. This access to standard FPGA design flows makes adoption of Achronix Speedcore eFPGA IP technology much easier for customers who are familiar with FPGA design.

The factors listed above are many of the important considerations for customers looking to start an evaluation of an eFPGA IP technology partner. To learn more about Achronix Speedcore eFPGA IP, please contact us today.