The Design Automation Conference (DAC) is recognized as the premier conference for design and automation of electronic systems.  DAC offers outstanding training, education, exhibits and superb networking opportunities for designers, researchers, tool developers and vendors. This year's event is virtual

See Achronix technology leaders at these sessions:

Tackling IP Challenges for Next Generation Technologies like AI/ML/5G

WEDNESDAY July 22, 1:30pm - 3:00pm 

A New & Efficient Block Floating Point Arithmetic Unit for AI/ML Workloads

Manoj Roge, Vice President Strategic Planning and Business Development

Application-Specific FPGA Architectures to Bring Flexibility into the 5G Communications and Compute Infrastructure

Mike Fitton, Senior Director Strategy and Planning

5G System Architectures

THURSDAY July 23, 1:30pm - 3:00pm

Chair:  Mike Fitton, Senior Director Strategy and Planning, Achronix

There is an excitement around 5G deployment these days, as we see the technical world mostly concerned about field trials and product launching. This session brings an industry update from both hardware and software worlds on how 5G goals can be achieved while meeting the cost constraints.

Will Die-to-Die Interface IP Enable Chiplet-Based Architectures to Finally Achieve Market Success?

THURSDAY July 23, 3:30pm - 5:00pm

Chair: Raymond Nijssen, Chief Technologist

Die-to-die interface IP technologies enable chiplet-based architectures. Placing multiple die from the same or multiple vendors, or simply partitioning a single SoC to provide acceptable yield, into multiple smaller die with improved yield is now possible. This session is based on invited papers, given by IP vendors of die-to-die PHYs and chiplet makers describing their proprietary solutions.