- Will showcase its technology for 5G wireless, HPC, ADAS and autonomous vehicles, machine learning and computer vision applications
- Speedcore eFPGA validation chip built on TSMC 16nm FinFET+ process technology to be displayed
Santa Clara, Calif., April 26, 2018 –– Achronix Semiconductor Corporation, a leader in field programmable gate array (FPGA)-based hardware accelerator devices and embedded FPGA (eFPGA) intellectual property (IP), will showcase the versatility of its Speedcore™ eFPGA devices during the TSMC 2018 North America and China Technology events in May.
The TSMC North America Symposium will be held Tuesday, May 1, in Santa Clara, Calif. TSMC Technology Workshops will be held Wednesday, May 9, in Austin, Texas, and Wednesday, May 16, in Boston.
Achronix will exhibit as well at the TSMC Technology Symposium in Shanghai, China, Tuesday, May 22.
Achronix’s booth will be in the Ecosystem Pavilion at the four events, highlighting its eFPGA technology for 5G wireless, HPC, ADAS and autonomous vehicles, machine learning and computer vision applications. It will display the Speedcore eFPGA production validation chip built on TSMC 16nm FinFET+ process technology and a PCIe board.
Designed to be embedded in SoCs and ASICs, Speedcore IP is a fully permutable architecture technology. It can be built with densities ranging from less than 10,000 look-up-tables (LUTs) up to two-million LUTs plus large amounts of embedded memory and DSP blocks. Speedcore eFPGA enables SoC developers to design programmability into their devices to be a platform for their reprogrammable hardware accelerators, to address changing standards, or to future-proof their products. When compared to standalone FPGAs, Speedcore eFPGAs deliver smaller die area, higher performance, lower power and lower overall system costs.
To learn more about the TSMC Technology Symposium and Technology Workshops, visit: https://bit.ly/2pR1H63
For more information about Achronix, go to: www.achronix.com