Santa Clara, Calif., February 5, 2019 – Achronix Semiconductor Corporation, a leader in FPGA-based data accelerator devices and high-performance eFPGA IP, had its new Speedcore Gen4 eFPGA IP recognized as one of the year’s hot 100 products of 2018 by the editorial staff of the EDN Network earlier this month. Speedcore Gen4 eFPGA IP was selected for EDN’s Hot 100 products of 2018 list for being one of the most “significant and useful new developments of the year.” The Speedcore Gen4 eFPGA IP was one of four winners in the Advanced Technology category.
Announced in December 2018, Speedcore Gen4 eFPGA IP can be used by ASIC and SoC design teams to incorporate programmable hardware-acceleration capabilities into ASICs and SoCs that serve a broad range of computing, networking, and storage systems for interface-protocol bridging/switching, algorithm acceleration, and high-speed packet-processing applications. Speedcore Gen4 eFPGA IP compared to its previous generation IP increases performance by 60%, reduces power by 50%, and shrinks die area by 65% while retaining and building upon all of the original Speedcore eFPGA IP’s functional capabilities. For more information on Speedcore Gen4 eFPGA IP, visit the Achronix website: https://www.achronix.com/product/speedcore-gen4-efpga-ip/
In particular, EDN editors cited the Speedcore Gen4 IP’s new machine learning processor (MLP) blocks, which have been added to the other resources already available in Achronix’s eFPGA IP library. The EDN Hot 100 products of 2018 for the Speedcore Gen4 eFPGA IP quotes EETimes’s Chief International Correspondent Junko Yoshida, who wrote “Gen4’s shiniest feature, added to its architecture by Achronix, are Machine Learning Processor (MLP) blocks” in her EETimes.com December 4, 2018 article, “Achronix Adds Machine Learning to eFPGA.”
Speedcore Gen4 MLP blocks are highly flexible compute engines with tightly coupled embedded memories that offer a unique solution for artificial intelligence and machine learning (AI/ML) applications while delivering the highest performance per watt at the lowest cost. Speedcore MLP blocks support multiple fixed-point and floating-point formats including Bfloat16, 16-bit, half-precision floating point, 24-bit floating point and block floating point (BFP). Designers can configure the Speedcore Gen4 MLP blocks with the optimal numeric precision that best achieves the performance and power goals for their applications.
“It’s a great honor for Achronix’s Speedcore Gen4 IP to have been recognized by EDN as one of the most significant electronic products to be announced in the Hot 100 products of 2018” said Steve Mensor, Achronix’s vice president of marketing. “We are particularly proud for our product’s win in EDN’s Advanced Technology category because we believe Speedcore eFPGA technology will be a major driver of AI/ML technology advances in data center and communication applications. Achronix is known for its high-performance FPGA ICs and IP, and the new, high-density Speedcore Gen4 eFPGA IP with its MLP blocks significantly raises the bar for eFPGA IP.”
About Speedcore Gen4 eFPGA IP
Achronix Speedcore Gen4 eFPGA IP provides an optimal balance of hardware acceleration for diverse applications. Previously found only in ASIC implementations, the new Speedcore Gen4 eFPGA architecture adds the flexibility and reprogrammability of Achronix’s proven FPGA technology to support new AI/ML and high-performance applications that require massive computing and I/O bandwidth.
Speedcore eFPGA IP can be integrated into an ASIC or SoC to provide a customized, programmable fabric. ASIC and SoC designers specify their logic, memory, DSP, and AI/ML resource needs. Achronix then configures the Speedcore IP to meet their individual requirements. Speedcore look-up-tables (LUTs), RAM blocks, DSP64 blocks, and MLP blocks can be assembled like building blocks to create optimal programmable fabrics for any given set of applications.
Speedcore Gen4 eFPGA IP Availability
Achronix is using its proven methodology to deliver Speedcore Gen4 eFPGA technology to developers who want to combine the benefits and flexibility of silicon-proven eFPGA IP with enhanced AI/ML capabilities. Speedcore Gen4 IP is available for licensing on the most advanced FinFET processes today. Contact Achronix for details about supported process technologies.