Four HPC Trends from SC22

Authored By:
Nick Ilyadis
Sr. Director, Product Marketing

Posted On: Nov 18, 2022

With over 11,000 attendees, this year’s Supercomputing Conference was a huge success. The best and brightest in the High-Performance Computing (HPC) community showed up to exchange ideas, technology goals, and aspirations in the field of supercomputing.

An ongoing theme in high-performance computing has been the need for accelerators to process workloads without the bottleneck of relying on server CPUs. At SC22, the Achronix team of engineers and product leads shared the underrepresented role FPGAs play in high-performance applications, as well as met with our partners, customers, and industry stakeholders to discuss new and upcoming trends. After attending excellent sessions and engaging in discussions with both attendees and our fellow exhibitors, here are four major HPC trends from this year’s conference that were significant takeaways.

1: Opportunities for Composable Systems

The volume and use cases for HPC is rapidly accelerating, driving the industry to reconsider traditional rack-mounted server architectures. Instead of conventional CPU-based techniques, the industry desperately needs accelerated data centers that are flexible and versatile in order to handle the dynamic and ever-changing HPC workloads.

In a very informative presentation, a panel of researchers from IBM, Sandia National Laboratories, and the University of Illinois approached this challenge with a discussion of composable systems and their potential for HPC.

IBM researchers defined a system of disaggregated individual resources that can be composed into workload execution units on demand. In this scheme, the CPU, hardware accelerators, memory, disks, and other infrastructure are dynamically pooled and grouped into various configurations to meet ever-changing service requirements.

Composable systems are perfectly aligned with FPGA-based accelerators as FPGAs can serve a variety of workloads utilizing a software-defined infrastructure of disaggregated hardware over a network fabric.

According to the panelists, the potential for composable systems in HPC is huge, allowing for more flexible and versatile hardware that can be scaled and dynamically reconfigured based on workload demands.

2: Use of High-Performance FPGA Chiplets in Heterogeneous Systems

While we heard many interesting talks at Supercomputing this year, we also had the chance to share some of our vision for the future. Among the many presentations we gave, a highlight was the presentation entitled “Uses of High-Performance FPGA Chiplets in Heterogeneous Systems.”

In high-performance heterogeneous computing, closely coupling Achronix FPGA accelerators with heterogeneous compute elements is critical to combat the increasing development costs of monolithic solutions. With the development of standardized die-to-die interfaces, chiplet technology is a reality.

The era of the chiplet has begun, whereby designers build systems consisting of tiny, interconnected ICs, each of which contains a well-defined subset of functionality. Within this, Achronix FPGAs provide the ideal base die to connect these small ICs in one package using standardized high-performance die-to-die interfaces such as Universal Chiplet Interconnect Express (UCIe). With a robust chiplet standard, designers reap the benefits of faster time to market, lower development costs, and more scalable solutions.

Our presentation covered this new era of chiplets and the role that Achronix FPGA technology will play in the future. We examined the robust UCIe open standard and FPGA architecture including utilizing a two-dimensional network on chip (2D NoC) as a standardized interface

3: Memory Heterogeneity in Supercomputing

As workloads for supercomputers have become more diverse and complex, so has the underlying hierarchy. No place did this seem more apparent than in the memory architecture of supercomputers.

Specifically, the industry has recently seen a rise in memory heterogeneity. A supercomputer’s memory architecture will consist of multiple memory components, each of which has its own diverse set of characteristics. As new memory concepts such as processing-in-memory and resource disaggregation continue to grow, memory heterogeneity is expected too as well.

With a growing diversity of memory structures, FPGAs help connect and accelerate data transfers across memory subsystems. This capability allows for greater flexibility and performance in memory architectures that can scale with the expanding workloads in HPC applications.

In a presentation at Supercomputing this year, a panel of researchers from Micron Technology, AMD Research, and Intel laid out their thoughts on the rise of memory heterogeneity, and how it will impact the HPC industry moving forward. FPGAs with CXL support can be part of this architecture going forward.

4: Advancing HPC with RISC-V

One of the major trends in computing this year has been the rise of the RISC-V instruction set architecture (ISA). Emerging out of a research project in 2011, RISC-V International has now grown to consist of hundreds of members, including many of the world’s largest companies. The movement is providing the industry with an open-source and performant ISA, effectively enabling thousands of designs to date.

SiFive’s Krste Asanović gave an informative presentation on the trend of RISC-V for HPC. Their talk covered the many advantages that the RISC-V architecture enables in HPC and outlined why RISC-V is particularly well-suited to meet the needs of the industry moving forward. Amongst these advantages are RISC-V's high-power efficiency as well as its support for customized instruction set extensions. Further, Asanović argues that the open model of RISC-V encourages healthy competition as well as collaboration, which will serve to ensure longevity and improvement in the ISA over time. RISC-V is now finding its way into FPGAs, providing even more flexibility in the types of workloads that can be supported.

After several years of virtual conferences, it was great to be back in person at SuperComputing, reengaging with old friends and discussing the future of High-Performance Computing.