- AccelerComm’s Polar Code IP integrated with Achronix Portfolio of FPGA products
- Achronix ACE design tools and AccelerComm IP integration targets Speedcore eFPGAs
Santa Clara, Calif., February 27, 2018 – Achronix Semiconductor Corporation, a leader in field programmable gate array (FPGA)-based hardware accelerator devices and embedded FPGA (eFPGA), announced its collaboration with AccelerComm Ltd, a semiconductor intellectual property (IP) company focusing on next-generation wireless communications acceleration. AccelerComm’s patent-pending Polar Code IP has been ported to support the Achronix portfolio of FPGA products, enabling rapid time to market and customization for 5G Enhanced Mobile Broadband (eMBB) utilizing New Radio. AccelerComm IP has been integrated with ACE design tools to target Achronix Speedcore™ eFPGA.
Polar forward error correction (FEC) codes are utilized in the control channel of high-performance 5G systems. The AccelerComm polar code solution is built around a unique memory architecture that delivers the right information to the right processing elements at the right time, improving hardware efficiency, power efficiency and latency. The availability of this IP for the Achronix Speedcore eFPGA fabric enables a lower power and higher throughput solution than alternative, software-based approaches. Instantiating the polar code IP within an eFPGA-equipped application specific integrated circuit (ASIC) or system on chip (SoC) enables an integrated solution with minimal communication latency and low-power consumption.
“We are pleased to be working with AccelerComm as part of the Achronix Partner Program,” says Mike Fitton, Achronix senior director, product planning and business development. “The ability to instantiate AccelerComm’s industry-leading Polar Code IP in our eFPGA allows Speedcore-enabled ASIC and SoCs to be updated to support new standards. We see that the ability to flexibly reprogram a hardware accelerator for new requirements and emerging standards is going to be fundamental for cost-effective 5G deployments.”
Achronix and AccelerComm will continue to develop solutions for future 5G releases. “The 5G standards need innovative development, particularly with new features required for ultra-reliable, low-latency communication and massive machine-type communication,” remarks Tom Cronk, chairman and acting chief executive officer at AccelerComm. “These new elements of the 5G Release 16 specification require innovation for emerging waveforms and new coding. AccelerComm excellence in IP engineering combined with the flexible hardware acceleration portfolio from Achronix provides a powerful way to future-proof customers’ communications infrastructure deployments.”
About Speedcore eFPGA
Speedcore eFPGA IP can be integrated into an ASIC or SoC to provide a customized programmable fabric. Users specify their logic, memory and DSP resource needs, then Achronix configures the Speedcore IP to meet their individual requirements. Speedcore look-up-tables (LUTs), RAM blocks and DSP64 blocks can be assembled like building blocks to create the optimal programmable fabric for any given application.
About AccelerComm, Ltd
AccelerComm is a semiconductor IP-core company that specializes in channel coding solutions. It is first to market with 100% 3GPP-compliant polar coding IP for 5G New Radio control channel, with an innovative memory architecture delivering minimal hardware and optimal power performance. Its innovative turbo coding technology enables 10 times the throughput and 10 times the latency improvement over existing products, making it ideal for meeting the requirements of LTE Advanced Pro. AccelerComm is one of the first to market with polar encoder and decoder solutions for the 3GPP New Radio control channel. Visit AccelerComm at: www.accelercomm.com.