Achronix Senior Technologists to Discuss Application-Specific FPGAs and Next-Generation Challenges for AI/ML, 5G System Architecture at the Virtual Design Automation Conference
Santa Clara, Calif., July 15, 2020 – Achronix Semiconductor Corporation, a leader in FPGA-based data accelerator devices and high-performance eFPGA IP targeting AI, ML networking and datacenter applications, announces the details around its participation at this year's virtual Design Automation Conference.
What
The Design Automation Conference (DAC) is recognized as the premier conference for design and automation of electronic systems. DAC offers outstanding training, education, exhibits and superb networking opportunities for designers, researchers, tool developers and vendors.
Achronix will be presenting during the IP Track at these sessions:
Wednesday, July 22, 1:30pm - 3:00pm
Session: Tackling IP Challenges for Next Generation Technologies like AI/ML/5G
“A New and Efficient Block Floating-Point Arithmetic Unit for AI/ML Workloads” — Speaker: Manoj Roge, Vice President Strategic Planning and Business Development
“Application-Specific FPGA Architectures to Bring Flexibility into the 5G Communications and Compute Infrastructure” — Speaker: Mike Fitton, Senior Director Strategy and Planning
Thursday, July 23, 3:30pm - 5:00pm
Session: Will Die-to-Die Interface IP Enable Chiplet-Based Architectures to Finally Achieve Market Success?
Chair: Raymond Nijssen, Chief Technologist
When/Where
The event takes place online July 20-24. For more information, please visit dac.com.